eXCite Professional / FPGA

Accepts standard ISO/ANSI-C and synthesizes Verilog or VHDL RTL output specific to FPGA or ASIC technologies. Allows SW and HW to communicate through channels. Powerful pipelining capabilities, automatic bit-reduction, plus delay and area optimization algorithms.

Specification

Input : ANSI-C
Output : RTL VHDL & Verilog
Synthesis Engine : High quality Behavioral Synthesis
Libraries : ALTERA, XILINX, ACTEL
CPU Bus Support : ALTERA Avalon Interface

Support Platform : Windows XP, 2000, RedHat Linux, SUN Solaris

License : Floating & Node Lock